Accelerators

• Learning resources

• Accelerator Design

  • Languages

  • Tools

  • Techniques

Learning resources

• Tutorial on Hardware Accelerators for Deep Neural Networks

Accelerator Design

• Languages, Tools, and Techniques for Accelerator Design, ACM SIGARCH

• Productive Parallel Programming for FPGA with HLS - ETH Parallel Computing lab

Languages

• Dahlia - A programming language for generating FPGA Predictable Accelerator Design designs. It uses affine types to reason about memory use and drastically reduces the parameter space of architectural parameters while accepting Pareto-optimal designs

• Aetherling - A system for automatically compiling data-parallel programs into statically scheduled, streaming hardware circuits.

Tools

Techniques

• Accelergy - An Architecture-Level Energy Estimation Methodology for Accelerator Designs