Hardware Design
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1.2.1. Beyond Moore's Law
1.2.2. Open Source Implementations
1.2.2.1. Open Core Collections
1.2.2.2. Elements
Blogs on Physical Design
Constraining Designs for Synthesis and Timing Analysis | A Practical Guide to Synopsys Design Constraints (SDC) - Gangadharan, Sridhar, Churiwala, Sanjay.
Static Timing Analysis for Nanometer Designs: A Practical Approach - Jayaram Bhasker and Rakesh Chadha.
WOSET: Workshop on Open-Source EDA Technology
OSDA: Workshop on Open Source Design Automation
DAC Birds of a Feather: Open Source Academic EDA Software
Analog, mixed-signal and RF circuit designers come to learn about simulation, modeling and design.
- OpenCores is the most prominent online community for the development of gateware IP (Intellectual Properties) Cores.
- A "LibreCore" is such an IP core that is created and distributed in the open source spirit.
- OpenTitan will make the silicon RoT design and implementation more transparent, trustworthy, and secure for enterprises, platform providers, and chip manufacturers.
- Common Hardware for Interfaces, Processors and Systems
- FIFO, onehot, round robin Arbiter etc.
- Open source Ethernet Core 1
- A dual clock asynchronous FIFO written in verilog, tested with Icarus Verilog
- This repository gathers several basic modules to handle CDC in a design
- Understanding synthesis of the one-hot mux
- Covers concepts, formal verification and language
David Fong's ASIC architecture
- An open source semiconductor manufacturing process standard
Rob A. Rutenbar, and
Sung Kyu Lim,
David Z. Pan,
Sanjit A. Seshia,
Chung-Kuan Cheng,
Gogul Ilango's notes
ZipCPU's - A good starting point for Verilog/ FPGA/ Formal Verification
Eric LaForest's as a resource about FPGAs, computer history, and computer architecture.
- Concepts and conventions explained
- Source code from the MicroZed Chronicles FPGA blog
- FuseSoC is an award-winning package manager and a set of build tools for HDL (Hardware Description Language) code. Its main purpose is to increase reuse of IP (Intellectual Property) cores and be an aid for creating, building and simulating SoC solutions.
- An abstraction library for interfacing EDA tools
- Open source software development framework with commercial support from Antmicro that lets you develop, debug and test multi-node device systems reliably, scalably and effectively.
and presentation by Andrew Kahng
presentation by Andreas Olofsson
- Insights from EDA users over the years
- Developer/Partner community that is also part of the Google Open Shuttle Program
- Free and Open Source Silicon (FOSSi) are components and systems that are inside silicon devices (‘chips’). It is our core belief that building blocks that form such digital devices can be made free and open
- The open source digital design conference organized by the
- Week of Open Source Hardware alongwith
- IEEE International Symposium on Circuits and Systems
- Conference on Neuromorphic Computing
- Conference on semiconductor technology and circuits
- International Solid-State Circuits Conference is the foremost global forum for presentation of advances in solid-state circuits and systems-on-a-chip
- Multicore SoC's
, co-located with ICCAD, Nov 8, 2018; San Diego, CA, USA.
, co-located with DATE, March 29, 2019; Florence, Italy.
ORConfs: | | | | | |
, June 5, 2019; Las Vegas, NV, USA.
, June 4, 2019; Las Vegas, NV, USA.